Hello,
I want to create a CPU-FPGA heterogeneous FHE accelerator now. The CPU and FPGA are connected using PCIe, and the host uses Xilinx OpenCL to interact with Xilinx Alveo U280 FPGA. I want to write HLS kernel functions for NTT, ciphertext multiplication, and other operations in OpenFHE, but I am not sure how to integrate these HLS kernels into the OpenFHE library. For example, when NTT operation is required, the operation results on FPGA can be used instead of the calculation results of the original functions in OpenFHE library. I understand that OpenFHE has a Hardware Abstraction Layer interface (HAL), but I don’t know how to use HAL to collaborate with HLS cores. The Vitis version used is 2023.1. I noticed a response from the community that the current HAL does not support working with PCI（ Polynomial Multiplication & other high-level operations on hardware backend - #5 by dcousins ）. If you could provide any advice and assistance, I would greatly appreciate it!
B1ankScript